Discrete-time radio frequency (RF) is a newly emerging field in wireless digital communications wherein analog RF signals that are transmitted over-the-air are directly sampled into a discrete-time sample stream suitable for digital signal processing. A typical wireless digital communications device would use analog filters, duplexers, mixers, analog-to-digital converters (ADC), etc. to convert the analog RF signals into a digital data stream that is suitable for digital signal processing. Unfortunately, analog circuit components, especially components such as capacitors, inductors, resistors, etc. necessary for the analog filters are difficult to integrate into an integrated circuit. This is especially true for the precise values of these components required for use in filters. Of course, it is the desire of the manufacturer to maximize the degree of integration for the wireless transceivers. This is because the more highly integrated a wireless transceiver can become, the lower the production costs for the transceiver and the transceiver will typically use less power during operation.
Discrete-time RF involves the direct conversion of the analog RF signal into discrete-time sample stream through the use of a direct sampling mixer, without having to undergo any intermediate analog continuous-time filtering, downconversion, etc. An example of a direct RF sampling mixer is one that uses current to perform its sampling. The current-mode direct sampling mixer converts the received analog RF signal into a current that is then integrated by a sampling capacitor. The charge on the sampling capacitor is then periodically read to produce the discrete-time sample stream.
After reading the charge on the sampling capacitor, any residual charge remaining on the sampling capacitor may be optionally reset. A reason for resetting the charge on the sampling capacitor is to prevent the excessive accumulation of charge during the sampling phase to saturate (or deplete) the charge storage capacity of the sampling capacitor, thus resulting in loss of information. For example, should there be a relatively large charge already on the sampling capacitor when it begins to accumulate charge during the integrating phase, it is possible for the accumulated charge when combined with the existing charge to be above the maximum (or be below the minimum) amount of charge that may be stored on the sampling capacitor. Once the sampling capacitor becomes saturated or depleted, information is lost.
One commonly used technique for resetting the sampling capacitor is to short the sampling capacitor to electrical ground to remove any charge from the sampling capacitor and then applying a known current to the sampling capacitor for a known amount of time. This develops a known voltage onto the sampling capacitor. The known voltage is commonly referred to as a bias voltage and the operation of placing the bias voltage onto the sampling capacitor is known as a precharge operation.
A disadvantage of this technique is the amount of power consumed in bringing the sampling capacitor up to the bias voltage value. Each time that the sampling capacitor is brought from zero volts to the bias voltage value, a significant amount of current is consumed. If the precharge operation occurred only infrequently, then it is possible to overlook the power consumption. However, the precharge operation occurs after each sample is read out from the sampling capacitor and depending on the sampling rate, the precharge operation can occur very frequently. This leads to the consumption of a considerable amount of power. In many applications, such as portable and battery powered radios, power consumption is of vital concern and should be minimized when possible.
Additionally, many mixers work with more than one signal stream, i.e., the RF current is periodically integrated at various points in time to produce multiple sample streams. For example, it is fairly typical for a digital transceiver to process the received signal stream as two separate streams, an in-phase (I) stream and a quadrature-phase (Q) stream. Additionally, many use differential signaling, wherein a portion of each signal is received along with a portion of the same signal that is 180 degrees out of phase. Therefore, the mixers can be quite complex, with four separate signal paths.
A significant disadvantage of having four separate signal paths in the mixer stems from the fact that each signal path requires a different clock. For example, the clock for a positive I stream will differ from the clock for a positive Q stream by 90 degrees and the clock for a positive stream will differ from the clock for a negative stream by 180 degrees. Since the clocks typically differ from one another by a phase angle, it is common for each signal path will have its own clock generation hardware.
One possible solution to providing separate clocks to each signal path is to provide each signal path with its own local oscillator (LO) generating a signal of desired period with the proper timing and then a series of clock dividers to generate clocks of the proper frequency from the signal generated by the LO. However, the use of a different LO for each signal path can result in synchronization problems due to frequency differences in the signals generated by the different LOs, resulting in a degraded downconverted signal. Alternatively, there may be a single LO, whose signal is fed to each of the signal paths and each signal path has its own clock generating hardware that would take the signal from the LO and derive the necessary clock signals. Regardless of whether a single LO or multiple LOs are used, there is typically a separate set of clock generating hardware for each signal path.
A major disadvantage in having separate clock generating hardware for each signal path is power consumption. As expected, the clock generating hardware must also be clocked at high frequencies and hardware clocked at high frequencies consumes more power than hardware clocked at low frequencies. Also for more complex clocking schemes, a large amount of hardware is required for the clock generating hardware. The clocking at high operating frequencies and the redundancy of the generating hardware results in a significant amount of power consumption. For example, in a mixer with four signal paths, four complete sets of clock generating hardware are required. An additional disadvantage is that the redundant clock generating hardware also requires a lot of real estate when it comes time to integrate the mixer hardware into an integrated circuit. The increased real estate results in a larger, more expensive device.
It is fairly typical that after a discrete-time sample stream has been produced by the mixer that the sample stream is to receive digital signal processing via processing elements and/or digital signal processors. The processing of the discrete-time sample stream, once it is converted into a digital bit stream, by processing elements and digital signal processors, etc., can inject a significant amount of noise into the current-mode mixer. The noise being a by-product of the high frequency (usually) clocks of the processing elements and the digital signal processors. If unattended to, the noise can have serious effects on the overall performance of the current-mode mixer and the entire device.
Although the bursts of digital activity may be only several nano-seconds in duration, the digital noise that is created by the bursts of activity may be periodic in nature and be of significant magnitude. It is the periodic nature of the noise along with its impulse-like response that can degrade the overall performance of both the mixer and the digital device through the injection of a significant amount of noise into the discrete-time sample stream.
A standard technique for noise suppression in integrated circuits is through the use of metal rings and deep wells placed onto the silicon substrate. The metal rings and deep wells are typically placed around the noise sources and/or noise-sensitive analog circuits. Unfortunately, the rings and wells cannot prevent noise that is carried on signal lines and power planes. Additionally, the use of rings and wells may increase the overall cost of the integrated circuit, due to the requirement for additional steps in the fabrication process and increased complexity in the design of the integrated circuit itself.
A need has therefore arisen for a mixer that can produce a clean discrete-time sample stream from an RF source with minimum power consumption and increased noise immunity.